1. Field of the Invention
The present invention relates to a mobile communication receiving apparatus for spread spectrum (SS) communication used for code division multiple access (CDMA) communication or radio local area network (radio LAN) communication in a mobile communication field, and in particular to reduction in power consumption and enlargement of the synchronization acquisition and hunt range.
2. Description of the Related Art
Since SS communication in a mobile communication field can cover a code division multiple access system and is also excellent in resistance to noise, it is applied to CDMA communication and radio LAN communication. With reference to FIG. 6, a conventional mobile communication receiver for SS communication comprises a reception antenna 1 for receiving signals, high-frequency circuitry 2 made up of a signal amplifier (referred to simply "amplifier"), a frequency convertor, and a band-pass filter (BPF), a low-pass filter (LPF) 3 for limiting reception signals to a base band, three inverse spread modulation and data demodulation sections, which will be hereinafter referred to as fingers, 4, 9, and 14 for inversely spread modulating reception signals spread modulated at transmitting side and reproducing modulation data components, and a synthesizer 20 for synthesizing output signals of the fingers for amplifying the data signal strength, as shown in FIG. 6.
Each of the fingers 4, 9, and 14 is made up of a PN code generation section 5, 10, 15 for generating the same pseudonoise (PN) code sequence as a transmitter, a synchronization acquisition/hunt section 6, 11, 16 for executing inverse spread modulation while synchronizing with the timing of a PN code of a reception signal and hunting the timing, an integrator 8, 13, 18 for integrating an inversely spread modulated reception signal for a given time for reproducing data, and a VCC section 7, 12, 17 for generating a voltage-controlled clock (VCC) used as a clock of the PN code generation section 5, 10, 15. The PN code generation sections 5, 10, and 15 are of the same configuration and perform the same operation; the integrators 8, 13, and 18 are of the same configuration and perform the same operation; and the VCC sections 7, 12, and 17 are of the same configuration and perform the same operation. The synchronization acquisition/hunt sections 6, 11, and 16 are of the same configuration, but execute inverse spread modulation at different timings.
The fingers execute inverse spread modulation at different timings for reproducing data and the synthesizer 20 synthesizes the reproduced data, whereby the receiver enables pass diversity for separating and synthesizing direct waves and multiple-reflected waves for reproducing data.
FIG. 7 shows the configuration of the finger in more detail. The finger, which has a delay lock loop (DLL) structure, comprises a multiplier 23 for multiplying PN code PN[k-1] leading inversely spread modulated PN code PN[k] by one chip in phase by a reception signal; a multiplier 24 for multiplying PN code PN[k+1] lagging PN[k] by one chip in phase by the reception signal, a multiplier 25 for multiplying PN[k] by the reception signal to output an inverse spread modulation output signal, an integrator 26 for integrating the output signals of the multiplier 23, an integrator 27 for integrating the output signals of the multiplier 24, a subtractor 48 for subtracting an output signal of the integrator 26 from an output signal of the integrator 27, a loop filter 29 for removing a noise component from an output component of the subtractor 48, an integrator 30 for integrating the output signals of the multiplier 25 and reproducing data, a threshold determiner 49 for comparing an output signal of the integrator 30 with a threshold value for determination, a voltage-controlled clock (VCC) 33 whose phase is controlled by an output signal of the loop filter 29, a feedback shift register 34 of N register length (taps) for cyclically shifting PN code by the VCC 33 output clock, and a PN code generator 35 for generating a PN code pattern of a transmitter.
The PN code generator 35 has a function of making output lag behind or lead ahead by several chip intervals.
Next, the operation principle of the finger of the DLL structure will be discussed with FIGS. 4A to 4D. In SS communication, for inverse spread modulation, a transmitter and a receiver have the same PN code sequence and multiply the same code at the same timing. The synchronization acquisition and hunt operation will be discussed.
FIG. 4A shows the output of an integrator 30. The vertical axis is an auto-correlation function R(t) of a PN code sequence of a transmitter and a receiver and corresponds to the output of the integrator 30 in FIG. 7. The horizontal axis shows PN code timing differences between the transmitter and receiver, wherein dt denotes one chip interval. When the PN code timing difference between the transmitter and receiver is 0, R(t) indicates the maximum value; when the PN code timing difference is 1 chip or more, R(t) becomes 1/L (L: Integration number) and almost 0 because L is sufficiently large. Therefore, data demodulation is impossible in the receiver when PN code synchronization is not acquired.
Then, in order to acquire synchronization, the receiver checks R(t) by the threshold determiner 49. When R(t) is equal to or less than a threshold value, the receiver makes the output PN code of the PN code generator 35 lag behind or lead ahead by several chip intervals for timing adjustment and again checks R(t). The receiver repeats this operation until the output of the integrator 30 exceeds the threshold value. When the output exceeds the threshold value, the receiver fixes the timing for acquiring synchronization. This is the synchronization acquisition operation principle.
Next, in order to hold the synchronization, the PN code of the reception signal is hunted. The hunt operation will be discussed with FIGS. 4A to 4D. FIG. 4B shows an output characteristic of the subtractor 48 (D2(t)). Receiver PN codes used by the multipliers 23 and 24 (PN[k-1] and PN[k+1]) are 1 chip lead and lag signals ahead and behind PN code PN[k] used for inverse spread modulation in the multiplier 25. Therefore, the auto-correlation functions (outputs of the integrators 26 and 27) are provided by shifting R(t) in FIG. 4A -dt and +dt and have the maximum values at -dt and +dt. Since the integrator 26 output is inverted and synthesized with the integrator 27 output by the subtractor 48, the output characteristic of the subtractor 48, D2(t), becomes as shown in FIG. 4B. Therefore, D2(t) becomes an increasing function passing through the origin at the .+-.dt interval. Thus, if the PN code phase difference is drawn into within .+-.dt, the phase of the VCC 33 is controlled by the signal resulting from removing the noise component of D2(t) through the loop filter 29, whereby the PN code of the reception signal can be hunted.
The description of the configuration and operation principle of the conventional mobile communication receiver for SS communication is now complete.
However, the conventional mobile communication receiver having a plurality of fingers involves a problem of an increase in power consumption.
When a DLL is used as the finger, because of the characteristics thereof, synchronization acquisition and hunting are limited in the range of .+-.dt at the maximum.